The present invention relates to a hierarchical probability model generation system, a hierarchical probability model generation method, and a program.
As one of methods for analyzing the reliability and availability of systems, an analysis method using a fault tree has been widely used (for example, Patent Document 1). In a fault tree, the failure event of a system is defined as a top event, events causing the occurrence of the top event are listed as basic events, and the top event is expressed by the combinational logic of the basic events. For the combination of basic events, an AND gate corresponding to a logical product, an OR gate corresponding to a logical sum, a k-out-of-n gate that produces an output when k out of n events occur, or the like is used. Provided that the occurrence probabilities of basic events are obtained, the occurrence probability of a top event can be found by repeatedly performing a calculation corresponding to the type of each gate.
The basic analysis of a fault tree is based on the premise that input basic events are independent of each other. When dependence exists between basic events, it is required to find the occurrence probabilities of the basic events considering the dependence to perform an analysis. For example, consideration is given to a case in which two basic events b and c simultaneously occur due to an event a not included in a fault tree. When the occurrence probability of the event a is expressed as P(a), both P(b) and P(c) include P(a). Accordingly, an analysis process using P(b) and P(c) may redundantly consider the influence of P(a), whereby the occurrence probability of a top event cannot be correctly found.
In order to correctly find the availability of a system having much dependence, it is required to perform modeling and an analysis using a state space model. For example, the state transition of a system is modeled by a continuous-time Markov chain (CTMC) and the CTMC is analyzed, whereby the probability of the system in its operating state can be found. Unlike a fault tree, a state space model such as the CTMC allows modeling considering various dependence. However, when a system to be analyzed is large and complex, a state space model faces the problem of state explosion. It becomes difficult to correctly perform the modeling and analysis of a system.
In order to address this, there has been proposed a method for analyzing availability using a hierarchical probability model in which the advantages of a fault tree (an event tree in a broad sense) and a state space model are combined together (for example, Non-Patent Document 1). A state space model is defined for each of basic events as the inputs of a fault tree, and a result obtained by analyzing the state space models is input to the fault tree to find the occurrence probability of a top event. The state space models are applied only to parts having the dependence therebetween, whereby an analysis result can be correctly found and the problem of state explosion can be reduced.
When a system is complex and large, it becomes difficult to generate a model for analyzing availability. In order to address this, there has been employed a method for automatically generating a fault tree and a state space model on the basis of the configuration information and availability requirements of a system.
Patent Document 1: Patent Publication JP-A-2007-122639
Patent Document 2: Patent Publication JP-A-2010-237855
Non-Patent Document 1: K. S. Trivedi, D. Wang, D. J. Hunt, A. Rindos, W. E. Smith, B. Vashaw, “Availability Modeling of SIP Protocol on IBM Web Sphere,” Proc. of PRDC 2008.
Non-Patent Document 2: F. Machida, E. Andrade, D. Kim and K. Trivedi, “Candy: Component-based Availability Modeling Framework for Cloud Service Management Using SysML”, In Proc. of 30th IEEE International Symposium on Reliable Distributed Systems (SRDS), pp. 209-218, 2011.